Event

SuSI Summit 2026 - Exploring Ways to Chiptainability

7. October 2026

08:00 - 17:00

Infineon Technologies AG
Am Campeon, 1-15
85579 München-Neubiberg
Deutschland
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Ein Wafer, umgeben von Nachhaltigkeitssymbolen AI-Generated ChatGPT,

SuSI Summit 26 – Sustainable Semiconductor Innovations Summit – is a one-day, high‑level conference dedicated to driving sustainability across the entire semiconductor value chain. Following a successful first edition, the 2026 summit at Infineon Campeon in Neubiberg / Munich brings together industry leaders, associations, academia, and policy makers from across Europe.

The Bavarian Chips Alliance is supporting the event as a partner.

Under the theme “Exploring ways to Chiptainability”, SuSI Summit 26 showcases cutting‑edge ideas on sustainable chip design, carbon reduction, twin transformation, and circularity. As a proven spillover event for IPCEI ME/CT, it provides a focused platform for expert exchange, collaboration, and practical solutions.

The event covers a wide range of topics, from innovation, materials, and manufacturing to digital transformation. The central question is how the semiconductor industry can turn sustainability into a concrete, measurable advantage.

Spanning innovation, materials, manufacturing, and digital transformation, the day explores how the semiconductor industry is turning sustainability into a tangible, measurable advantage. From integrating digital and green strategies, to moving beyond carbon reporting toward real emissions reduction, sessions will highlight practical approaches to building more transparent, resilient, and low-impact supply chains. You’ll also discover advances in sustainable materials, cleaner production technologies, and smart manufacturing solutions that reduce waste while improving yield. Together, these perspectives showcase how sustainability is no longer a parallel effort, but a core driver of performance, value creation, and long-term competitiveness.

After attending the SuSI Summit, you will have:

  • clear understanding of current best practices and future trends in different aspects of sustainable semiconductor manufacturing.
  • Concrete insights into new technologies and innovative solutions that drive sustainability in chip manufacturing.
  • Valuable contacts with industry leaders, start-ups and policy makers.
  • Actionable knowledge about regulatory developments that directly influence your strategic decisions.
  • Venue

 

The event will be held in English.

Executives and Decision-makers: Gain strategic insights into sustainable trends shaping semiconductor manufacturing.

Engineers and Researchers: Discover innovative technologies and approaches for sustainable production and design.

Policymakers and Regulators: Understand critical policy developments and regulatory frameworks affecting the semiconductor sector.

Investors and Stakeholders: Explore investment opportunities and network with key industry players advancing semiconductor sustainability.

8:00 a.m.

Morning Coffee and Registration

Corinna Wolf
Infineon

Stefan Wunderer
Nokia

9:00 a.m.

Welcome and Opening of the SuSI Summit 2026

Innovation Paths

9:30 a.m.

"Chiptainability: Driving Sustainable Innovation Across AI and 6G"

Subho Mukherjee
VP of Sustainability, Nokia

9:50 a.m.

"Moving Toward Sustainable Electronics Through Twin Transformation"

Speaker to be announced
Infineon

10:10 a.m.

"Sustainable Business Innovations"

Henning Breuer
Innovation Consultant, Professor & Author, uxberlin.com

10:30 a.m.

Coffee, Exhibition, and Networking

Technology Paths

11:15 a.m.

"Molybdenum and Tungsten for a Greener Semiconductor Future: Plansee’s Path to Sustainable Materials"

Dr. Christoph Adelhelm
Business Development Manager for EUV, Electronics Business Division, Plansee

11:35 a.m.

"Enabling Low-Emission Polysilicon Etching: NOx Reduction via DeNOx Technology"

Sebastian Liebischer
Innovations Manager, Semi Products, Wacker

This work presents an integrated DeNOx approach to enable low-emission polysilicon etching operations. A key challenge in silicon etching arises from the batch-wise immersion and removal of silicon from the etching solution, which result in highly dynamic process conditions and sharp NOx concentration gradients in the exhaust gas. These transients place significant demands on downstream abatement systems. To address this, advanced real-time NOx measurements were implemented upstream of the DeNOx catalyst, enabling fast response times and high-resolution monitoring of rapidly changing emission profiles. Catalyst operation was further optimized through improved gas mixing, ensuring uniform flow distribution and full utilization of the active catalyst surface. At the same time, an enhanced control concept, including Advanced Process Control (APC), was deployed to proactively manage load changes and stabilize catalyst performance under dynamic conditions. These combined measures resulted in a substantial and sustained reduction in NOx emissions while increasing etching productivity, demonstrating a scalable pathway toward environmentally optimized polysilicon manufacturing.

11:55 a.m.

"From Scrap to Savings: VisionIQ for Sustainable Semiconductor Yield"

Dr. Thomas Bauer
AI Lead Manufacturing (Semiconductor), ams Sensors Germany GmbH (OSRAM)

Semiconductor manufacturing faces increasing pressure to improve yield, reduce scrap, and lower its environmental footprint—while managing growing process complexity and data volumes. VisionIQ addresses this challenge by introducing a scalable, AI-driven vision framework that transforms image-based inspection data into actionable production insights.

This approach moves beyond isolated, rule-based vision solutions toward a unified architecture for AI image classification across multiple process steps and equipment types. By detecting subtle defect patterns earlier and more consistently, VisionIQ enables faster root-cause analysis, targeted process adjustments, and a measurable reduction in scrap and rework.

This talk presents the VisionIQ concept from a manufacturing perspective: how standardized data ingestion, model governance, and production-ready deployment enable AI vision to scale sustainably in high-volume semiconductor environments. Real-world insights from front-end manufacturing illustrate how VisionIQ contributes not only to yield improvement and cost savings, but also to resource efficiency and long-term sustainability in semiconductor production.

12:15 p.m.

"Green is Black: Maximizing Value from Concept to Circularity"

Luca Fontanella
Sustainability Champion, ST Microelectronics

Abstract

 

Integrated sustainability embeds environmental and social criteria into every step of the value chain—from technology and product design, through manufacturing and use, to reuse and recycling—while systematically tracking economic impact. By designing products for energy efficiency, durability, repairability, and recyclability, companies reduce material and energy consumption, limit waste, and mitigate regulatory and reputational risks. In manufacturing, resource optimization, process efficiency, and responsible sourcing translate directly into lower operating costs and more resilient supply chains. At the end of a product’s life, strategies such as remanufacturing, component harvesting, and closed-loop recycling recover material and functional value that would otherwise be lost. When these actions are coordinated within a circular business model, the cumulative effect is clear: over the full lifecycle, sustainable design and operations generate more gains than losses and more income than spending—through cost savings, new revenue streams, risk reduction, and enhanced brand and market positioning.

12:35 p.m.

Lunch, Exhibition, and Networking

Carbon Reduction Pathways

1:35 p.m.

"From Carbon Reporting to Carbon Reduction: How Agentic AI Is Rewiring Semiconductor Supply Chains"

Payal Shah
Co-Founder, NeoNetra

1:55 p.m.

"Semiconductor Sustainability Beyond Green Electricity"

Dr. Wolfgang Nüchter
Mobility Electronics, Operational Sustainability Officer, Bosch

The increasing use of green electricity is a key factor in reducing the carbon footprint of semiconductor manufacturing, but it does not eliminate all relevant environmental impacts. This paper analyzes the effect of green electricity on Bosch’s corporate footprint and illustrates the impact at the product level using a MEMS device as an example. A comparison of scenarios with and without green electricity highlights the significant potential for reduction, while also revealing remaining contributors such as process gases, abatement efficiency, and consumables.

Going beyond climate change mitigation, the paper extends the perspective to biodiversity impacts, focusing on material origin and supply chains for critical raw materials such as gold and platinum group metals. The analysis shows that further progress requires increased use of recycled precious metals, improved abatement technologies, and the development of alternative process gases. These measures are essential to achieving a more comprehensive sustainability transformation of semiconductor manufacturing.

2:15 p.m.

"Milliwatts at Scale — Power Optimization and the CO₂ Footprint in the ASIC Design Process"

Richard Willems
Swissbit

2:35 p.m.

"Assured and Auditable: Product Carbon Footprints That Stand Up to Real Scrutiny"

Stephen Russell
Senior Technical Fellow – Sustainability, TechInsights

Sustainability claims in the semiconductor industry are increasingly being challenged not because of intent, but because of whether a carbon footprint can be reproduced, compared, and defended during an audit. Using EcoInsights workflows, we will demonstrate how to generate ISO 14067-compliant PCFs, along with an audit package that includes assumption registers, sensitivity tests, and traceability artifacts suitable for customer procurement and third-party review.

A deep-dive case study will link assurance practices to architectural design decisions in advanced packaging: comparing two die-stack options where a seemingly minor choice—such as selecting a 2GB versus a 3GB DRAM die—significantly alters the packaged device’s PCF through die area, yield, and packaging contributions. We will demonstrate how boundary and allocation choices can exaggerate or mask that design impact, and how standardization and assurance controls restore decision-grade comparability, enabling engineering and procurement teams to make defensible “twin transformation” trade-offs.

2:55 p.m.

Coffee, Exhibition, and Networking

Collaboration Paths

3:30 p.m.

World Café / Infineon Tour

4:20 p.m.

World Café Panel

4:50 p.m. – 5:00 p.m.

Closing of the SuSI Summit 2026