Accessibility
Language
Event
4th symposium on chip development - AI in chip design
25. March 2026
10:00 - 17:00
The Bavarian Chip Design Center (BCDC) cordially invited to the 4th Symposium on Chip Development, which was held in cooperation with the Bavarian Chips Alliance. This event was aimed at all interested parties in the field of IC design and the semiconductor ecosystem.
The Bavarian Chip Design Center (BCDC) is committed to further expanding chip design capabilities in Bavaria and providing companies, especially start-ups and SMEs, with easier access to chip design and the necessary supply chains. On Wednesday, March 25, 2026, participants experienced an exciting day at Fraunhofer IIS in Erlangen-Tennenlohe on the topic of "AI in chip design".
Overview
In the morning, participants gained a comprehensive insight into modern EDA tools that are supported by artificial intelligence. Various EDA providers, such as Cadence Design Systems or Siemens Digital Industries Software, will presented their available solutions, explained the functions they offer and demonstrated the added value these tools can provide in the IC design process.
In the afternoon, participants had the opportunity to experience first-hand how AI-supported applications are used in real projects. The focus was on practices, efficiency gains achieved and the concrete benefits for providers and users of IC design.
The breaks and get-together were used to network with industry experts and make valuable contacts.
Participation was free of charge.
Welcoming address by Prof. Dr.-Ing. Giovanni Del Galdo, Director of Fraunhofer IIS
Session 1: AI-based EDA tools in chip design: technologies and potential benefits
KEYNOTE
AI and Semiconductors: Where Growth Comes From and Where Value Accrues
Dr. Ondrej Burkacky, Managing Director Semiconductor, MGX
Presentations
Agentic AI: ushering into a new era of chip design
Klaus Cerny, Senior Account Technical Executive, Cadence Design Systems
AI - Lowering the Barrier to Silicon
Thomas Heurung, Technical Director EMEA, Siemens Digital Industries Software
The Impact of AI on Digital Back-End IC Design
Dr. Tobias Bjerregaard, Executive Director, AI , Synopsys Inc
Networking & finger food
Session 2: User perspective: AI-supported EDA tools in use
KEYNOTE
AI-Driven Chip Design - Accelerating Development Performance
Dr. Nico Wolf, Director | Head of High Tech/Silicon Engineering, Capgemini Engineering SA
Presentation
The Future of Competitive Analog Design: A Research Perspective on AI Agents
Dr. Andrea Bonetti, Technical Lead and Team Manager, Sony AI
Coffee break
Session 3: Tools for IC Design Optimization
Presentations
From Ground Truth to Trust: The Vital Role of Formal Verification in the Age of AI
Dr.-Ing. Mo Fadiheh, Head of R&D, LUBIS EDA GmbH
AI-Assisted HDL: What Works, What Breaks, and How to Control Risk
Lieven Lemiengre, Product Manager, Sigasi nv
AI Driven Analog Optimisation
David Conochie, Chief Sales Officer, IC Optimize ApS
Wrap up and outlook
Farewell with concluding get-together
The presentations will be held in German and English.
Moderation: Dr. Denise Müller-Friedrich, Head of Smart Sensing and Electronics, Fraunhofer IIS
